The article title is “Is Life a Weighbalance” and that too the weighbalance is so smart enough to balance automatically…
What do i mean?
Is to gain some thing or expertise in some thing do i need to loose in an another area or i loose focus in other area and over a period of time i loose.
An Individual being successful in financial domain , most of the time looses focus either in family/relationship or in health.
on the contrary a person who is so focussed in health and family the proabability that he may not be shinning in financial or other domain is quiet obvious…
I do undergo enough pain to get my muscles toned (Gym)
I do undergo stress, mental tention, tired, to be successful in my career. There may be articles, books talking about stress management, work and fun and things like that , but all top business do undergo lot of stress..
The point here is you decide the pain for what you value the most .
God has structured so well about Life, HE has given ownership to each and everyone about their individual decisions, individual pains, what each one thinks to attain in their life/living say one want to venture in business, one want to excel in sports, one want to decide and dedicate his life to spirituality… we so called Virtual owners, but ultimately the Real Owner (God) decides what to put in the weigh balance to weigh for some it is nano-grams and for some one it is tons…
It is that moment of life what you are in to , could be right side or left side of the weighing machine, could be called success or could be called failure, could be called pain or could be called gain.
Categories: Uncategorized
Tagged: depression, God, happiness, Life, lifestyle, people, sorrow
In today’s world DFT(Design for TEst) is an no-excuse and design teams struggle hard to cover all the portions of the failures caused due to manufacturing.
The science behind this is DFT, rather it goes with the article, how to design rtl, which is friendly to DFT.
What all we can think up-front to make sure that the turnaround time to perform scan-insertion is less and we dont see the warnings in our test-insertion tool and then go back to RTL to ensure that we have coded our logic and our constructs are friendly enough for execution.
Some of the DFT violations include,
Modelling Violations,
improperly driven tri-states violations,
Asynchronous signal active during scan violations
flop clock/set/reset input not controllable
…….
to know more about this and to know how to code rtl to make DFT friendly visit the detailed article @
http://www.vlsichipdesign.com
Categories: Uncategorized
Tagged: chip, chipjobs, ASIC, jobs, dft
hi,
i often wonder why the hell others look only negatives what i have.
like, You could have managed your family better?
you should have thought about savings/brought in early financial security?
why are you getting bald early?
watch your tummy its growing?
so, what do they really want…
- Do they want to get hold of the communication, and to convey that they are better off?
- do they want to pull me down, why the hell they cannot see the good things i have and spread the positive energy
- why they want to pull me down.
so the bottom-line is “you know better rather best about you” so never get you down, just because other person want to pull you down, keep yourselves away of the negative energies around you, it will eat your brain and stop you moving forward and be successfule.
Be positive and spread positive energies around.
Categories: Uncategorized
Tagged: depression, feedback, people, positive energy, stress
hi,
i am totally pissed off…. everywhere there is negative energies, colleagues , friends, neighbours are getting laid-off…
how do i get busy, and what i do today, how do i spend my time?
Do i partition a day to cry, get depressed , eat and sleep or i schedule in a different way…
Huge transition when my outlook calendar gets overlapped to no entry in my calendar… what next??
now lets plan ..
- Let me do financial budgetting, let me remember and do my budgetting and create a chart what i can call as necessity and what i can partition in luxury. Luxury portion needs to be revisited either to remove it completely or postpone like vacation,party, buying costly dresses, cars …
- Is there any way i can generate some money.
- This duration you can opt to strengthen your skills to “Sharpen your Saw” , check whether you can improve on your skills could be technical skills, soft skills, work on the area which needs improvement, we didnot found time to strengthen us , now if time and money permits can think of that. Do some certification, short-courses, higher studies.
- Write blog/maintain web-site share your work-experiences, educate others , now we need to increase self-moral. “Sharing is an art”
- Work on your areas of improvement
- Spend time with your family , we all had a complaint that work-life balance was not possible earlier, now we can work on the family.
- Spend time with your pets, they are stress bursters, will reduce our stress .
Energize yourself , your family, your friends, your neighbours, create positive energy amoung you around you, get charged and move on…
Categories: Uncategorized
Tagged: counselling, depression, economic-depression, economic-difficulties, economic-realities, experienced, financial-markets, global-economy, global-recession, job-losses, jobs, layoff, losing-a-job, recession, walk-in Interview, world-economy
Employer recieves lot of applications and now it is recession time as well and so many of them apply for the same post.
To know more visit @
http://www.vlsichipdesign.com
- how to make sure i get an edge over others?
- how to increase the probability of getting the resume selected?
- Can i write write resume in a paragraph?
- what all i need to put in my resume?
- Can i write a booklet as my resume or is there some restriction to the number of pages?
- what i should place in my first page?
- what all information i need to publish interms of projects?
Cover in the First page
You have only one chance , your first page should speak about yourself, it is rare chance if your first page is not so impressive its harder to have a second chance to turn the page though you might have done wonders in the pages to come, so spend lot of time , in editing and compiling the first page
- Always have an Objective as the first point
- Let your objective be crystal clear as a "Win-Win situation", Your employer should gain by sharing your experience to have a faster turn-around time,with Quality as well as you also gain with Remuneration and Recognition
- Now comes the important part " Profile Section/Skills"
- Your Technical Skills , Strengths, Tools,
- Your Patents, Papers, Certifications
- Write about your current Employer
- Your Roles /Designation
Next pages
- Explain about your projects. Title, Roles, Complexity, Tools/Languages/Protocols used
- Good Abstract about the project, dont write everything in this , just be short and sweet so that in your interview you have something to share
- More over write the projects from your latest one to the oldest one, no-body is interested to know what you done ten years ago, and things ,tools, languages, methodologies change so dynamically
- Write few lines about your complexity of your Role, no stories
Employer history
- Write about your Employers from latest to the oldest
- Write your duration
- Write your Roles,
- Write your Designation
Certification/Tutorials/Workshops/Conferences
- List down your Certifications
- List down your attended Tutorials
- List down attended Workshops
- List down attended Conferences
Others
- Mention your Visas, incase if you have Work-Visas
- If you are multi-lingual mention it adds value
- Your interests, let it align with the Objective or goal
Categories: career
Tagged: career, chip, coveringletter, employment, experienced, freshers, interview, jobs, layoff, recession, resume, vlsi, walkin
After reading lot of articles about Management and spirituality i came with some thoughts in me.
Spirituality , contented , self-happy is totally opposite to Business, Business model.
If we want to experience and practice spirtuality at the initial part of your life , then you may loose interest in the worldly matters like Money,Marriage,children.
Society drives us, and puts road-map across us to fulfill, like are you graduated, did you get the job, are you married, do you have kids, is your kid started walking, is your kid started talking, did you join the kid in the pre-school, school,college, marry…..
To fullfill is we need money,health,good relationship.
If Spirituality is teaching me good and to satisfy the above needs, then i follow at the start of my life, but if Spirituality is about in search of God, i would like to reserve it at the later part of my life.
Categories: Uncategorized
Tagged: business, God, peace, spirituality
hi friend,
If you are looking for the job, then what will be your first question and what kind of answer you need to be prepared with??
Tell about your project?
- Explain a bit about your domain of your project like wireless, wire-line, microprocessor to name.
- What part of it you were involved in that project
- how many people were reporting to you
- who is your client or for whom you were doing this project?
- what is your roles and responsibilities in that project
- what all cores where present in that chip
- what is the technology like 130,90,65,45nm
- what is the clock-frequency
- how many clock-domains
- what is the voltage value
- what is the macro-count
- what is the flip-flop count
- what are the various analog macros
- how many pads were there
- what is your skew you had achieved
- what is your insertion delays
- what is your pll jitter
- how did you model your uncertainities or variations
- how many power-domains were there
- did you have multi-VDD
- if you had multi-VDD how did you handle insertion of level-shifters
- what is the SSN(simultaneous switching noise) pad ratios used in your design.
- how did you prevented noise in your chip
- how many placeable instances
- what is the cell-row utilization
- is your design pad-limited or core-limited
- did you multiplexed your pads
- what type of package wafer bond or flip-chip
- if flip-chip how did you distributed power bumps any special strategy
- how many metal layers in your technology
- did you used in house library or from any vendor
- what is the die-area of your chip
- what is the x and y
- did you had any rectilinear macros if so any thing special you did during floor-plan
- did your chip had multi-vt flow , yes or no
- if multi-vt how did you managed using it in synthesis
- what is the extraction process
- what are the various IO’s like PCI/SPI/SDIO/USB/….
- how many STA modes did you had
- did you run functional STA and Test STA
- did you balance test clocks
- did you chip test works on atspeed or low speed
- what is your scan-shift frequency
- how many test-modes do you have
- do you test analog macros during test
- do you have jtag mode
- how many plls do you have
- do you have fractional pll’s as well
- do you have DSP in your chip
- what are the various protocols used in your chip
- what is the maximum bus frequency in your chip
- do you have multiple masters and multiple slaves accessing your chip bus
- how did your bus arbitration logic work
- do you have soft resets
- do you synchronous your resets or not
- do you have latches in your chip
- how many power domains do you have
- what is the supply pad voltage
- do you used diodes to eliminate ESD
- how many layers do you do power-routing
- what is the layers you use for clock-routing
- do you do anything special for special nets in routing phase
- did you do routing timing driven or not
- did you enable signal integrity while routing
- did you validate SI based STA using PT-SI or some other tool
- what is the extra margin di dyou kept during synthesis phase
- how many ECO’s do you faced to close the timing or functional verification
- do you used to run formal verification to validate the handover RTL and netlist are fine
- did you checked antenna violation
- did you qualify your chip with GLS(gate level simulation)
- what is the package frame number
- how did you performed timing budgetting
- anything special you did to increase the yield
- how did you estimate your power-strips and meshes widths
- do you have different analog ground and digital ground if so for any reason or not
- do you short analog and digital grounds
- what is the type of mbist controllers you used
- did you run capture mode simulations
- do you used any test-compression logic in your chip
- what is your fanout tree count
- do you build tree scan-enable resets as-well
- did you used clock-gating logic
- how did you selected register widths to be gated
….
most of the above mentioned questions you can find answers in the website http://www.vlsichipdesign.com
all the best
Categories: ASIC
Tagged: ASIC, asic design, ASIC verification, asicverification, chip design jobs, chip jobs, chipdesign, chipjobs, computer, eda, embedded, embedded sys, fresher jobs, freshers, Freshers Jobs, hardware, job, semiconductor, silicon, vlsi, vlsidesign, vlsijobs, walk-in, walk-in Interview, walkin, walkins
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what is the difference between mealy and moore state-machines
how to solve setup and hold violations in the design
what is antenna violation & ways to prevent it
we have multiple instances in RTL(Register Transfer Language), do you do anything special during synthesis stage
what is tie-high and tie-low cells and where it is used
what is the difference between latches and flip-flops based designs
what is High-Vt and Low Vt cells
what is LEF mean?
what is DEF mean?
steps involved in designing an optimal padring
what is metastability and steps to prevent it
what is local-skew, global skew and useful skew
what are the various timing-paths which i should take care in my STA runs?
what are the various components of leakage-power
what are the various yield losses in the design
what is meant by virtual clock definition and why do i need it
what are the various variations which impacts timing of the design
what are the various Design constraints used, while performing synthesis for a design
specify few verilog constructs which are not supported by the synthesis tool
what are the various capacitances with an MOSFET?
Vds-Ids curve for an MOSFET, with increasing Vgs
explain basic operation of an MOSFET
what is channel length modulation
what is body effect
what is latchup in CMOS design and ways to prevent it?
what are the various design changes you do to meet design power targets
what is meant by library characterization
what is meant by wireload model
what are the measures to be taken to design for optimized area
what all will you be thinking while performing floorplan
what are the measures in the design taken for meeting signal integrity targets
what are the measures taken in the Design achieving better yield
what are the measures or precautions to be taken in the design when the chip has both analog and digital portions.
what are the steps incorporated for Engineering Change order[ECO]
what are the steps performed to achieve Lithography friendly Design
what does synthesis mean?
what are the pre-requistes to perform synthesis
can you explain the synthesis flow
what are the various ways to reduce clock insertion delay in the design
what are the various functional verification methodologies
what does formal verification mean
how will you time the output path in STA
how will you time the input path in STA
what is false path mean in STA and in what scenarios falsepath can come
what does multicycle path mean in STA and in what scenarios MCP can come
what are source synchronous paths in STA
Assume there is a specific requirement to preserve the logic during synthesis , how will you achieve it
we have multiple instances in RTL, do you do anything special during synthesis stage
what do you call an event and when do you call an assertion
Categories: Uncategorized
Tagged: ASIC, embedded, freshers, hardware, job, jobs, vlsi
