Touch base on Hardware/Software Codesigning

In todays Art of Chip Designing is how to undergo co-designing means both hardware and software co-designing parallely to utilize the time.

Mantra of any todays product: Reduced Design cycle time why so, Competition across products/companies as  well as reduced life-cycle of any Design.

Traditionally we used to start designing softwares, only after hardware is up and running. In Todays world there is no time, every one is running fast, how can chips design cycle run slow.

what are the Co-design problems?

  • Capturing Design Requirements in a language [HDL languages/ C/C++]
  • How to perform constraint modelling and how to analyze
  • How to perform Virtual Prototyping
  • How to and where to partition across hardware and software
  • Synthesis of Software and Hardware understandings
  • Optimization Strategies across interfaces
  • What are the strategies or methodologies to be followed to design language independent, compiler friendly, target independent.
  • what is our objective Rapid prototyping or Hardware Emulation.
  • Handling of mostly single threaded software vs Multi-threaded Hardware.
  • Difference of Concept Engineering : Software Engineers Sequential Algorithmic Thoughts Versus Hardware Engineers Concurrent Hardware Modeling using DFG[Data Flow Graphs].

when most functions of digital can be implemented in software then what is the need for Hardware, does this make sense?

  • Meet Performance Metrics like reduced Latency targets
  • As hardwares are tailor made for a specific application, performs faster

References:

1. System Synthesis via Hardware-Software Co-design by Rajesh K. Gupta & Giovanni De Micheli

To know the concepts about Chip Designing :

http://www.vlsichipdesign.com

2 Responses to Touch base on Hardware/Software Codesigning

  1. Hi friends
    How to and where to partition across hardware and software. Please help me in understanding with an example.

    Thanks and Regards
    BODDU

  2. Thanks a lot for your valuable suggestion and putting my inclinations towards chip designing .

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