what is going to be my first interview question?

hi friend,

If you are looking for the job, then what will be your first question and what kind of answer you need to be prepared with??

Tell about your project?

• Explain a bit about your domain of your project like wireless, wire-line, microprocessor to name.
• What part of it you were involved in that project
• how many people were reporting to you
• who is your client or for whom you were doing this project?
• what is your roles and responsibilities in that project
• what all cores where present in that chip
• what is the technology like 130,90,65,45nm
• what is the clock-frequency
• how many clock-domains
• what is the voltage value
• what  is the macro-count
• what is the flip-flop count
• what are the various analog macros
• how many pads were there
• what is your skew you had achieved
• what is your insertion delays
• what  is your pll jitter
• how did you model your uncertainities or variations
• how many power-domains were there
• did you have multi-VDD
• if you had multi-VDD how did you handle insertion of level-shifters
• what is the SSN(simultaneous switching noise) pad ratios used in your design.
• how did you prevented noise in your chip
• how many placeable instances
• what is the cell-row utilization
• is your  design pad-limited or core-limited
• did you multiplexed your pads
• what type of package wafer bond or flip-chip
• if flip-chip how did you distributed power bumps any special strategy
• how many metal layers in your technology
• did you used in house library or from any vendor
• what is the die-area of your chip
• what is the x and y
• did you had any rectilinear macros if so any thing special you did during floor-plan
• did your chip had multi-vt flow  , yes or no
• if multi-vt how did you managed using it in synthesis
• what is the extraction process
• what are the various IO’s like PCI/SPI/SDIO/USB/….
• how many STA modes did you had
• did you run functional STA and Test STA
• did you balance test clocks
• did you chip test works on atspeed or low speed
• what is your scan-shift frequency
• how many test-modes do you have
• do you test analog macros during test
• do you have jtag mode
• how many plls do you have
• do you have fractional pll’s as well
• do you have DSP in your chip
• what are the various protocols used in your chip
• what is the maximum bus frequency in your chip
• do you have multiple masters and multiple slaves accessing your chip bus
• how did your bus arbitration logic work
• do you have soft resets
• do you synchronous your resets or not
• do you have latches in your chip
• how many power domains do you have
• what is the supply pad voltage
• do you used diodes to eliminate ESD
• how many layers do you do power-routing
• what is the layers you use for clock-routing
• do you do anything special for special nets in routing phase
• did you do routing timing driven or not
• did you enable signal integrity while routing
• did you validate SI based STA using PT-SI or some other tool
• what is the extra margin di dyou kept during synthesis phase
• how many ECO’s do you faced to close the timing or functional verification
• do you used to run formal verification to validate the handover RTL and netlist are fine
• did you checked antenna violation
• did you qualify your chip with GLS(gate level simulation)
• what is the package frame number
• how did you  performed timing budgetting
• anything special you did to increase the yield
• how did you  estimate your power-strips and meshes widths
• do you have different analog ground and digital ground if so for any reason or not
• do you short analog and digital grounds
• what is the type of mbist controllers you used
• did you run capture mode simulations
• do you used any test-compression logic in your chip
•  what is your fanout tree count
• do you build tree scan-enable resets as-well
• did you used clock-gating logic
• how did you selected register widths to be  gated

….

most of the above mentioned questions you can find answers in the website http://www.vlsichipdesign.com

all the best